(untitled) (Journal of Science and Technology, 2016)
The need for higher manufacturing yields and improved operational reliability of Semiconductor Devices and circuits has led to a continuing scrutiny of all processing steps of these De-vices. Just like in the bulk of semiconductor, allowed states also occur at the surface of a semiconductor within the energy gap, which are called surface states. A third type of states, similar to surface states, occur at the interface of Si/Si02 system. These states are called inter-face states. Very often they are simply called surface states. The origin of these states is much less understood than that of bulk states. There is as yet no satisfactory theoretical model for explaining the existence of interface states at Si/SiO 2 interface of MOS Devices. These interface charges have been found to vary, among other things, with the oxide thick-ness, oxidation temperature and substrate thick-ness. Since the greatest body of scientific and technological work has been carried out on silicon, Si/SiO 2 interface will be treated predominantly in this present investigation. A model, based on the piezoelectric response of SiO 2 to thermally-induced external stress assumed to be present during fabrication, has been developed to investigate existence of interface states at Si/SiO 2 interface. To confirm this idea the interface charge density has been computed. The model predicts variations of interface charge density with oxide and substrate thickness which fairly explains the experimental results.